Random access solid-state image scanner

ABSTRACT

An image scanner adapted for random-access and semirandom-access scanning (of a document, e.g.) comprises an array of photodiodes each having one terminal respectively connected to a plurality of field-effect transistors and another terminal receiving a sawtooth wave. The gates of the transistors receive control voltages according to a predetermined voltage gradient. The voltage gradient is in turn selectively controlled by a control signal, to thereby establish the point at which scanning begins.

United States Patent Inventors Appl. No.

Filed Patented Assignee Priorities Yasuo Ishihara;

Takao Ando; Tukasa Alkahoshi, all of Tokyo, Japan July 22, 1970 Dec. 7,1971 Nippon Electric Co., Ltd.

Tokyo, Japan July 29, 1969 Japan Sept. 10, 1969, Japan, No. 44/712247RANDOM ACCESS SOLID-STATE IMAGE SCANNER 14 Claims, 10 Drawing Figs.

US. Cl 250/209, 178/7.1, 307/311, 315/169 R Int. Cl H0lj 39/12 Field ofSearch 178/7.1;

340/166; 307/31 1; 315/169 R, 169 TV; 250/21 1 J; 317/235 N; 250/209Sawtooth Generator l [56] References Cited UNITED STATES PATENTS3,378,688 4/1968 Kabell 250/209 3,487,263 12/1969 Pahlavan 315/169 R3,488,508 1/1970 Weimer.. 4. 307/311 3,517,258 6/1970 Lynch 315/169 RPrimary Examiner- Robert L. Griffin Assistant Examiner-George G. StellarArlorney-Sandoe, Hopgood and Calimafde ABSTRACT: An image scanneradapted for random-access and scmirandom-access scanning (of a document,eg.) comprises an array of photodiodes each having one terminalrespectively connected to a plurality of field-effect transistors andanother terminal receiving a sawtooth wave, The gates of the transistorsreceive control voltages according to a predetermined voltage gradient.The voltage gradient is in turn selectively controlled by a controlsignal, to thereby establish the point at which scanning begins.

Control Signal Source Command Signal Source PATENTED DEC 7197! SHEET 1OF 3 Control Signal Source Diffen-mriu'ror L T Command Snqnol l Source TM H8 i I i i I Sow-tooth Generator Llioedbook Pot h FIG. I

,1, 22 I50 l5b |5 lsp'ls n" 2' Ground Potential Position on Resistor l5FIG. 2

//Vl/ENTO/?S YASUO ISHIHARA TAKAO ANDO TUKASA AKAHOBHI ATTORNEYSPAIENTEDDEC mm 3.626193 SHEET 3 OF 3 From Binory Command Counter SignolSource l8 To Resistor l5 Reset Input from l8 Sow-tooth L GeneratorHolding Circnit 58 V G018 0- Synchronizing Signal Source F I G. 6

I/VVE/VTORS YASUO ISHIHARA TAKAO ANDO TUKAS'A AKAHOSHI ATTORNEYS RANDOMACCESS SOLID-STATE IMAGE SCANNER This invention relates generally toimage scanners, and more particularly to an image scanner for use inimage pickup, facsimile, and character recognition.

A moving aperture, an electron beam, and a light beam have been commonlyemployed to perform image scanning. Among these known approaches to theproblem of image scanning, electron beam scanning has generally beenregarded as the most reliable and favorable. However, as a result of therapid development of integrated circuit techniques, attempts have beenmade to develop a practical solid state image scanner. Also, recentdevelopments in the field of optical character recognition systems havecreated a great demand for a significantly simplified image scanningdevice.

Scanning systems that have heretofore been proposed for solid stateimage pickup devices can be classified into two types. One is based onthe combination of a photodiode matrix and tapped delay circuitsconnected to a pulse source, and the other comprises a combination'of aphotodiode array and a bleeder coupled to a scanning sawtooth source. Inthe former, a great number of active and passive circuit elements areneeded, with the result that the device as a whole is complicated instructure and difficult and costly to manufacture, along withinsufficient reliability and short useful life.

The solid state image scanner of the latter type is called a scanistor,"and was developed by International Business Machines Corporation. Adetailed description of the scanistor is given in the Proceedings of theIEEE, Vol. 52, No. 12 (Dec.

I964), pages 1513 to 1528. Briefly, in the scanistor, the switchingdiodes interconnected with the photodiodes are forward and reversebiased by a scanning voltage. More specifically, the switching diode ofeach of the parallel connected photodiode-switching diode pairs isinitially reverse biased. The sawtooth voltage is then applied to thediode pairs, to thereby sequentially turn the switching diodes into theforward-biased state. This results in the sequential turning of thephotodiodes into the reverse biased state. During the scanning period,the scanning current is subjected to variations depending on thebrightness of the elementary images projected respectively on thephotodiodes. The scanistor should, however, be formed of a bipolardevice to be readily realized in the form of an integrated circuit. Amultilayer structure should therefore be employed in order to form theswitching diodes and photodiodes within a single substrate. This,however, unavoidably presents difficulties in the actual manufacturingprocess of the scanistor.

In order to simplify the manufacturing process, a description of animproved solid state image scanner is made in copending application Ser.No. 856,723 filed on Sept. 10, I969, and assigned to assignee of thepresent application. The proposed scanner employs in place of thebleeder diodes, a plurality of metal-insulator-semiconductor (MIS) typeFETs, each in diode connection. The MIS FET structure of said copendingapplication is readily adapted to integrated circuit configuration ascompared to the conventional scanistor. However, with the scanningdevice disclosed in said application, only a regular unidirectionalscanning operation is possible, in which the scanning is started at oneend of a document or image and finished at the other. This is due to thefact that each of the FETs is in diode connection. That scanning deviceis thus not adapted to a random-access scanning or semirandom-accessscanning, in which the scanning is initiated at any point along thephotodiode array.

On the other hand, there is an increasingly great demand forrandom-access and/or semirandom-access scanning largely as a result ofthe development of optical character recognition (OCR) technology. Forexample, a document to be subjected to OCR does not always have a wellbalanced format. There are some cases where the message is printed onthe left-hand or right-hand side in one part of a document, and on therighthand or left-hand side in another part of that document. Thoroughscanning of such documents by the conventional devices is time-consumingand ineffective. Random access is favorable in such a case for switchingfrom one scanning mode (restricted to the left-hand side, for example)to another (restricted to the right-hand side).

It is therefore an object of the present invention to provide a solidstate scanner of the modified scanistor type, particularly well adaptedto random-access and semirandom-access scanning.

In the scanning device of the present invention, the FETs employed asthe bleeder means are not in the diode connection as in the device ofsaid copending application, but are rather in the transistor connection.More specifically, in the present device, the cathodes of the photodiodearray are connected in common to a sawtooth wave source, while theanodes of the photodiode array are connected in common to the sourceelectrodes of the FETs on the bleeder side. The gate electrodes of the FETs are connected to a DC voltage source, while the drain electrodes ofthe FETs are connected in common to a differentiating circuit for theseparation of the video signal component. To one end of the tappedresistor is connected a control voltage source which generates a controlsignal synchronized with the sawtooth wave. The control voltage is, inits effect, superimposed on the sawtooth wave and causes a change in thetime point in each of the scanning periods at which a particular one ofthe FETs is turned to the conductive state. As long as the controlsignal is not effectively superimposed on the sawtooth wave, scanning isperformed from one end of the photodiode array to its other end.

To the accomplishment of the above and to such further objects as mayhereinafter appear, the present invention relates to a solid state imagescanner substantially as defined in the appended claims and as described:in the following specifica' tion taken together with the accompanyingdrawings in which:

FIG. 1 is a schematic diagram partly in block form of an image scanneraccording to a preferred embodiment of the present invention;

FIG. 2 illustrates a voltage distribution characteristic for describingthe operation of theimage scanner of FIG. I;

FIGS. 311-30 and 4a to 40 are waveform diagrams for further describingthe device of FIG. 1;

FIG. 5 is a schematic diagram partly in block form of a detailedstructure of a part of the device of FIG. I; and

FIG. 6 is a schematic diagram in block form of a modification of theembodiment of FIG. 1.

Referring to FIG. I, the image scanner device of the present inventionis disclosed with respect to an embodiment thereof which comprises anarray of photodiodes P,, P P P and P The cathodes of photodiodes P,P areconnected by a lead I l in common to a sawtooth wave generator 12, andthe anodes of these photodiodes are respectively coupled to the sourceelectrodes of P-channel enhancement type MIS FETs 0,, Q Q Q and Q Thedrain electrodes of FETS (Jr-Q5 are connected in common by a lead 13 toa differentiating circuit 14. The gate electrodes of FETs Q,Q arecoupled respectively to taps 15a, 15b, 15c, 15d and 152 of a resistor15, across which a DC power source 16 having an output voltage level V,,is coupled.

The spatial interval between taps 15a, I5b,...., and ll5e issubstantially equal, so that there is a substantially equal differencesin the DC voltages respectively appearing at these taps. A controlsignal source 17 is coupled to the end of resistor 15 near the tap I52.Sawtooth wave generator I2 and control signal source I7 are connected toa synchronized command signal source I8 so that the sawtooth wave andthe control signal are controlled in a predetermined time relationship.

Referring to FIG. 2, the spatial position on resistor I5 is plottedalong the abscissa, while the voltage is plotted along the ordinate. Aswill be seen from the drawing, the voltage appearing across every twoneighboring resistor taps 15a and 15b, 15b and 150, and so on, is set atl/2)V,,,, where V is the gate threshold voltage of each of the FETsQlQ5. Assuming that the control voltage (to be described later) suppliedfrom signal source I7 is of such a constant value that makes the voltageof tap 15c zero, the voltage distribution on resistor R5 is as shown bya straight line 21. In this state, the sawtooth wave generator 12generates the sawtooth wave.

FIG. 3(a) shows such a sawtooth wave voltage as plotted against time. Asis shown, the time gradient or slope of the rising straight line of FIG.3(a) is made exactly identical to that of line 21 in FIG. 2. On the samescale, FIG. 3(b) shows the total photocurrent characteristic curve 24observed at the lead 13 (FIG. 1), and FIG. 3(0) shows thetime-differentiation of curve 24 observed at the output of thedifferentiating circuit 14.

Continuing to refer to FIGS. 3(a), (b) and (c), the lead 11 is kept atzero potential at time point to. Therefore, except for FET Q which issupplied at terminal 15a with a voltage V,,,, FET's Q,-Q are all kept inthe off state, with their gate electrodes maintained at voltages higherthan the threshold level (It should be noted here that these FETs are ofthe P-channel enhancement type, which are kept in the off state when thegate voltage is higher than the threshold value). Under this state,however, the photodiode P, is not sufficiently reverse biased to reachthe photosensing state. With the lapse of time after point 1,, thereverse biasing of diode P, is increased to bring the diode I into thephotosensing state, while the gate biasing voltage of FET Q, reaches thethreshold value to turn it to the on" or conductive state whereupon theoutput current of diode P, appears on output lead 13. The increment ofthe photocurrent is sensed by differentiating circuit 14.

With the rise of the sawtooth wave, photodiodes P P are sufficientlyreverse biased to reach their photosensing state. On the other hand,FETs -0 are respectively kept in the off state until the lapse of acertain length of time from the time points of the turning on of diodesP P into their photosensing state. More specifically, at time point t,,the sawtooth wave reaches a voltage level (l/2)V,,,, bringing the gatevoltage of FET O to the threshold value V,,,. Therefore, thephotocurrent representative of the light value at diode P appears atlead 13 after the lapse of a certain length of time from time point 2,.This increment of the photocurrent is sensed by diode P Likewise, attime points 2 t and t FETs Q Q and Q are respectively turned to theconductive state, thereby causing the photocurrent at lead 13 to changeas shown in FIG. 3(b). The increments of the video components of thephotocurrent are sensed by the differentiating circuit 14 as shown inFIG. 3(c).

As will be understood from the above description, the waveform of FIG. 3is obtained when the voltage distribution at bleeder resistor 15 is thatas shown by straight line 21. Assuming that the control voltage suppliedfrom the source 17 is decreased by (l/2)V,, (which is equal to a quarterof the output voltage V, of the voltage source 16) the voltagedistribution along resistor 15 is shifted to the state shown by thebroken line 22 (FIG. 2) such that a voltage as high as a gate thresholdvoltage of the FETs is caused to shift from 15a to tap 15b. When thisoccurs both FETs Q and Q are turned to the on state at the beginning ofscanning by the operation of the sawtooth wave. Since the photocurrentvariation following the turning on of FET O1 is exactly the same as thatof FIG. 2, the total photocurrent change is as shown by curve 41 in FIG.4(a), and the video output component is as shown in FIG. 4(b).

Likewise, if the voltage distribution at resistor 15 is further loweredby (I/2)V,,,, as shown by the broken line 23 (FIG. 2), the tapmaintained at the gate threshold voltage is caused to shift from tap 15bto tap 15c. As a result, FETs 0,, Q and Q are in the on state at thebeginning of scanning by the sawtooth wave. Thus, the total opticalcurrent varies as shown by curve 42 in FIG. 4(a), and the differentiatedcurrent variation is therefore as shown in FIG. 4(c).

As is apparent from the foregoing description, the scanningstartingpoint on the diode array can be controlled in response to the controlvoltage supplied from control signal source 17 in response to thecommand signal supplied from command signal source 18. The controlsignal can be synchronized with the sawtooth wave and lasts for the sameperiod as the latter. It

follows, therefore, that the random control of the scanning point or, inother words, random access of OCR, is made possible by the presentcircuit arrangement.

FIG. 5 illustrates in greater detail the design of control signal source17, in which a serial binary command signal is supplied from the commandsignal source 18 (FIG. I) to a binary counter 170. The command signal iscounted down and, at the same time, converted into parallel binaryoutputs S,,, S and 8,. These outputs are coupled to the junctions ofdiode l7l-resistor 172, diode 173-resistor 174, and diode -resistor 176,respectively through diodes 171, I73 and 175. The other ends of diodes171, 173 and 175 are connected via a resistor 177 to the anode of aconstant voltage source 178, while those of resistors 172, 174, and 176are connected to the cathode of another constant voltage source 179. Thecathode of voltage source 178 and the anode of source 179 are groundedin common. A commonjunction 180 of diodes 171, 173 and 175 is connectedto the tapped resistor 15 (FIG. I). As will be seen, the potential atjunction 180 is controlled by the state of the binary outputs S S I andS and is thus responsive to the command signal supplied from the signalsource 18.

Referring further to FIG. 5 and also to FIG. I, the output of thedifferentiating circuit 14 may be fed back to the command signal source18. In such a case, the source 18 generates the command signal to decidewhere to start the scanning on the basis of the video output fed backthereto.

In the foregoing description, it has been assumed that the photodiodearray is made up of only five diodes. It will be apparent that thenumber of photodiodes may be increased arbitrarily.

As was previously mentioned in the introductory part of thespecification, the circuit arrangement of the invention is extremelywell adapted to fabrication as an integrated circuit. However, there isa limitation to the size of a silicon wafer. For a large area to bescanned, a plurality of such wafers must therefore be arrangedside-by-side.

FIG. 6 illustrates a modification of the device of FIG. I that isparticularly well adapted for the above-mentioned purpose. In FIG. 6,the circuit arrangements, here shown as three in number, 51a, 51b, 51c,are arranged side-by-side as shown. A sawtooth wave is supplied from thesawtooth wave source 56, and the document to be scanned and readout iscaused to move by mechanical means (not shown) in the directionindicated by arrow 57.

The outputs of circuits 51a, 51b, and 510 are temporarily held at aholding circuit 58. The output is then time-sequentially derived fromholding circuit 58 at an output terminal 61 in response to thesynchronizing signal supplied to a gate circuit 59 from a synchronizingsignal source 60.

This modification of FIG. 6 is advantageous in that the peak voltage ofthe sawtooth wave need not be as high as compared with the case wherethe number of photodiodes is increased in the arrangement of FIG. I towiden the scanning range. This brings about a significant advantage whenthe sawtooth wave generator is to be formed in a silicon substratecommon to the scanning device portion, because an integrated circuit isnot well suited for forming a high voltage sawtooth wave generator. Thegate circuit 59 capable of operating at sufficiently high speeds mayalso be formed on the silicon wafer common to the scanning deviceportion. A detailed circuit structure of holding circuit 58 and gatecircuit 59 is not described herein since the design of these circuits iswell within the skill of those having ordinary skill in pulse and binarycircuit design. In addition, in contrast to the modification of FIG. 6,the plurality of the unit scanning circuits 51 may be arrangedside-by-side in the direction of the document movement.

It will thus be apparent to those skilled in the art that, in additionto those mentioned above, various other modifications are possiblewithout departing from the spirit and scope of the invention.

We claim:

1. A random access solid state image scanner device comprising an arrayof field effect transistors, each having gate and source output anddrain output electrodes; a plurality of photodiodes each having oneterminal coupled respectively to one of the output electrodes of saidfield effect transistors; voltage supplying means for supplying asawtooth wave in common to the remaining terminals of said photodiodes;means for supplying a controllable fixed voltage to the gate electrodesof each of said transistors, said controllable fixed voltage having apredetermined gradient with respect to said array; voltage controllingmeans for controlling said controllable fixed voltage in a predeterminedtimed relationship with said sawtooth wave so that the gate voltage atsaid transistors may be varied; and image output means coupled to theother output electrodes of said field effect transistors.

2. The image scanner of claim l, in which said voltage supplying meanscomprises resistance means having a plurality of taps thereonrespectively coupled to the gate electrodes of said transistors, and avoltage source coupled to the ends of said resistance means.

3. The image scanner of claim 2, in which said voltage controlling meanscomprises means coupled to one end of said resistance means forselectively shifting the voltage levels at said taps.

4. The image scanner of claim 3, in which the voltage level betweenadjacent ones of said taps is approximately (l/2)V,,,, where V is thegate threshold voltage of said field effect transistors.

5. The image scanner of claim 4, in which said voltage controlling meanscomprises means effective when operated in response to a command signalto shift the level at said taps by a value of approximately one gatethreshold voltage.

6. The image scanner of claim 5, in which the slope of said sawtoothwave as a function of time is substantially equal to said predeterminedvoltage gradient.

7. The voltage source of claim 5, in which said voltage controllingmeans comprises a binary counter receiving said com mand signal, firstand second voltage sources, a junction coupled to said voltage sourcesand to said one end of said resistance means, and a plurality ofswitching means coupled between said binary counter and said junction,said switching means being controlled by the output of said binarycounter, whereby the voltage at said junction is controlled in responseto the operation of said counter and thus to said command signal.

8. The image scanner of claim 6, wherein said image output meanscomprises differentiating means coupled to the other output electrodesof said transistors.

9. The image scanner of claim ll, in which the slope of said sawtoothwave as a function of time is substantially equal to said predeterminedvoltage gradient.

10. The image scanner of claim 9, in which said voltage supplying meanscomprises resistance means having a plurality of taps thereonrespectively coupled to the gate electrodes of said transistors, and avoltage source coupled to the ends of said resistance means.

ill. The image scanner of claim ill), in which said voltage controllingmeans comprises means coupled to one end of said resistance means forselectively shifting the voltage levels at said taps.

12. The image scanner of claim 1, wherein said image output meanscomprises differentiating means coupled to the other output electrodesof said transistors.

13. The image scanner of claim 1, further comprising command signalproducing means responsive to the output of said photodiodes forcontrolling the operation of said voltage controlling means.

M. The image scanner of claim 8, further comprising means coupled tosaid differentiating means for controlling the operation of said voltagecontrolling means in response to the output level of said photodiodes.

1. A random access solid state image scanner device comprising an arrayof field effect transistors, each having gate and source output anddrain output electrodes; a plurality of photodiodes each having oneterminal coupled respectively to one of the output electrodes of saidfield effect transistors; voltage supplying means for supplying asawtooth wave in common to the remaining terminals of said photodiodes;means for supplying a controllable fixed voltage to the gate electrodesof each of said transistors, said controllable fixed voltage having apredetermined gradient with respect to said array; voltage controllingmeans for controlling said controllable fixed voltage in a predeterminedtimed relationship with said sawtooth wave so that the gate voltage atsaid transistors may be varied; and imaGe output means coupled to theother output electrodes of said field effect transistors.
 2. The imagescanner of claim 1, in which said voltage supplying means comprisesresistance means having a plurality of taps thereon respectively coupledto the gate electrodes of said transistors, and a voltage source coupledto the ends of said resistance means.
 3. The image scanner of claim 2,in which said voltage controlling means comprises means coupled to oneend of said resistance means for selectively shifting the voltage levelsat said taps.
 4. The image scanner of claim 3, in which the voltagelevel between adjacent ones of said taps is approximately (1/2)Vth,where Vth is the gate threshold voltage of said field effecttransistors.
 5. The image scanner of claim 4, in which said voltagecontrolling means comprises means effective when operated in response toa command signal to shift the level at said taps by a value ofapproximately one gate threshold voltage.
 6. The image scanner of claim5, in which the slope of said sawtooth wave as a function of time issubstantially equal to said predetermined voltage gradient.
 7. Thevoltage source of claim 5, in which said voltage controlling meanscomprises a binary counter receiving said command signal, first andsecond voltage sources, a junction coupled to said voltage sources andto said one end of said resistance means, and a plurality of switchingmeans coupled between said binary counter and said junction, saidswitching means being controlled by the output of said binary counter,whereby the voltage at said junction is controlled in response to theoperation of said counter and thus to said command signal.
 8. The imagescanner of claim 6, wherein said image output means comprisesdifferentiating means coupled to the other output electrodes of saidtransistors.
 9. The image scanner of claim 1, in which the slope of saidsawtooth wave as a function of time is substantially equal to saidpredetermined voltage gradient.
 10. The image scanner of claim 9, inwhich said voltage supplying means comprises resistance means having aplurality of taps thereon respectively coupled to the gate electrodes ofsaid transistors, and a voltage source coupled to the ends of saidresistance means.
 11. The image scanner of claim 10, in which saidvoltage controlling means comprises means coupled to one end of saidresistance means for selectively shifting the voltage levels at saidtaps.
 12. The image scanner of claim 1, wherein said image output meanscomprises differentiating means coupled to the other output electrodesof said transistors.
 13. The image scanner of claim 1, furthercomprising command signal producing means responsive to the output ofsaid photodiodes for controlling the operation of said voltagecontrolling means.
 14. The image scanner of claim 8, further comprisingmeans coupled to said differentiating means for controlling theoperation of said voltage controlling means in response to the outputlevel of said photodiodes.